Commit a3f7a71
committed
common: Make sure RAM inference works with yosys
icecube doesn't care about init values, but yosys does and you can't
satisfy them with HW RAM module.
So here we remove all the init values and we make sure the reads are
not dependent on the reset line
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>1 parent 09f1703 commit a3f7a71
2 files changed
+5
-4
lines changed| Original file line number | Diff line number | Diff line change | |
|---|---|---|---|
| |||
51 | 51 | | |
52 | 52 | | |
53 | 53 | | |
54 | | - | |
| 54 | + | |
55 | 55 | | |
56 | 56 | | |
57 | 57 | | |
| |||
344 | 344 | | |
345 | 345 | | |
346 | 346 | | |
| 347 | + | |
| 348 | + | |
| 349 | + | |
347 | 350 | | |
348 | 351 | | |
349 | 352 | | |
| |||
352 | 355 | | |
353 | 356 | | |
354 | 357 | | |
355 | | - | |
356 | | - | |
357 | 358 | | |
358 | 359 | | |
359 | 360 | | |
| |||
| Original file line number | Diff line number | Diff line change | |
|---|---|---|---|
| |||
14 | 14 | | |
15 | 15 | | |
16 | 16 | | |
17 | | - | |
| 17 | + | |
18 | 18 | | |
19 | 19 | | |
20 | 20 | | |
| |||
0 commit comments