From 5cdce25bf3964f99656a10f741b17692792d5b30 Mon Sep 17 00:00:00 2001
From: Marc Chevalier <marc.chevalier@oracle.com>
Date: Fri, 12 Dec 2025 14:09:27 +0000
Subject: [PATCH 01/12] Remove push_CPU_state in
 g1BarrierSetAssembler_aarch64.cpp

---
 .../cpu/aarch64/gc/g1/g1BarrierSetAssembler_aarch64.cpp       | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/hotspot/cpu/aarch64/gc/g1/g1BarrierSetAssembler_aarch64.cpp b/src/hotspot/cpu/aarch64/gc/g1/g1BarrierSetAssembler_aarch64.cpp
index 396c72bd725..b8d1577c128 100644
--- a/src/hotspot/cpu/aarch64/gc/g1/g1BarrierSetAssembler_aarch64.cpp
+++ b/src/hotspot/cpu/aarch64/gc/g1/g1BarrierSetAssembler_aarch64.cpp
@@ -217,7 +217,7 @@ void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
   // Check if it's sufficient
   //__ push_call_clobbered_registers();
   assert_different_registers(rscratch1, pre_val); // push_CPU_state trashes rscratch1
-  __ push_CPU_state(true);
+  // __ push_CPU_state(true);
 
   // Calling the runtime using the regular call_VM_leaf mechanism generates
   // code (generated by InterpreterMacroAssember::call_VM_leaf_base)
@@ -238,7 +238,7 @@ void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
     __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
   }
 
-  __ pop_CPU_state(true);
+  //__ pop_CPU_state(true);
 
   __ bind(done);
 

From e3d7c53ca8ed50bcd5d706a69a7cd7c052e4266d Mon Sep 17 00:00:00 2001
From: Marc Chevalier <marc.chevalier@oracle.com>
Date: Fri, 12 Dec 2025 14:34:40 +0000
Subject: [PATCH 02/12] Add push_call_clobbered_registers in
 g1BarrierSetAssembler_aarch64.cpp

---
 .../cpu/aarch64/gc/g1/g1BarrierSetAssembler_aarch64.cpp        | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/hotspot/cpu/aarch64/gc/g1/g1BarrierSetAssembler_aarch64.cpp b/src/hotspot/cpu/aarch64/gc/g1/g1BarrierSetAssembler_aarch64.cpp
index b8d1577c128..a258cc9d86d 100644
--- a/src/hotspot/cpu/aarch64/gc/g1/g1BarrierSetAssembler_aarch64.cpp
+++ b/src/hotspot/cpu/aarch64/gc/g1/g1BarrierSetAssembler_aarch64.cpp
@@ -215,7 +215,7 @@ void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
 
   // TODO 8366717 This came with 8284161: Implementation of Virtual Threads (Preview) later in May 2022
   // Check if it's sufficient
-  //__ push_call_clobbered_registers();
+  __ push_call_clobbered_registers();
   assert_different_registers(rscratch1, pre_val); // push_CPU_state trashes rscratch1
   // __ push_CPU_state(true);
 
@@ -238,6 +238,7 @@ void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
     __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
   }
 
+  __ pop_call_clobbered_registers();
   //__ pop_CPU_state(true);
 
   __ bind(done);

From ac1904981a6df41c942e69f6c3227908aa41efc3 Mon Sep 17 00:00:00 2001
From: Marc Chevalier <marc.chevalier@oracle.com>
Date: Mon, 15 Dec 2025 12:36:24 +0100
Subject: [PATCH 03/12] Asserting

---
 .../aarch64/gc/g1/g1BarrierSetAssembler_aarch64.cpp |  4 +---
 src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp  |  8 ++++++++
 src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp   | 13 ++++++++++---
 3 files changed, 19 insertions(+), 6 deletions(-)

diff --git a/src/hotspot/cpu/aarch64/gc/g1/g1BarrierSetAssembler_aarch64.cpp b/src/hotspot/cpu/aarch64/gc/g1/g1BarrierSetAssembler_aarch64.cpp
index a258cc9d86d..cfedd471b84 100644
--- a/src/hotspot/cpu/aarch64/gc/g1/g1BarrierSetAssembler_aarch64.cpp
+++ b/src/hotspot/cpu/aarch64/gc/g1/g1BarrierSetAssembler_aarch64.cpp
@@ -215,9 +215,8 @@ void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
 
   // TODO 8366717 This came with 8284161: Implementation of Virtual Threads (Preview) later in May 2022
   // Check if it's sufficient
-  __ push_call_clobbered_registers();
   assert_different_registers(rscratch1, pre_val); // push_CPU_state trashes rscratch1
-  // __ push_CPU_state(true);
+  __ push_call_clobbered_registers();
 
   // Calling the runtime using the regular call_VM_leaf mechanism generates
   // code (generated by InterpreterMacroAssember::call_VM_leaf_base)
@@ -239,7 +238,6 @@ void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
   }
 
   __ pop_call_clobbered_registers();
-  //__ pop_CPU_state(true);
 
   __ bind(done);
 
diff --git a/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp b/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp
index 13ef76c784a..9ce5bc098ba 100644
--- a/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp
+++ b/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp
@@ -7164,6 +7164,14 @@ bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, in
   // TODO 8366717 We need to make sure that r14 (and potentially other long-life regs) are kept live in slowpath runtime calls in GC barriers
   Register tmp1 = r10;
   Register tmp2 = r11;
+
+#ifndef ASSERT
+  RegSet clobbered_gp_regs = MacroAssembler::call_clobbered_gp_registers();
+  assert(clobbered_gp_regs.contains(tmp1), "tmp1 must be saved explicitly if it's not a clobber");
+  assert(clobbered_gp_regs.contains(tmp2), "tmp2 must be saved explicitly if it's not a clobber");
+  assert(clobbered_gp_regs.contains(r14), "r14 must be saved explicitly if it's not a clobber");
+#endif
+
   Register fromReg = noreg;
   ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, -1);
   bool done = true;
diff --git a/src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp b/src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp
index c35d2a66a02..ebd71ffb680 100644
--- a/src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp
+++ b/src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp
@@ -620,18 +620,25 @@ static void gen_c2i_adapter(MacroAssembler *masm,
 
   __ bind(skip_fixup);
 
-  // TODO 8366717 Is the comment about r13 correct? Isn't that r19_sender_sp?
   // Name some registers to be used in the following code. We can use
   // anything except r0-r7 which are arguments in the Java calling
-  // convention, rmethod (r12), and r13 which holds the outgoing sender
+  // convention, rmethod (r12), and r19 which holds the outgoing sender
   // SP for the interpreter.
-  // TODO 8366717 We need to make sure that buf_array, buf_oop (and potentially other long-life regs) are kept live in slowpath runtime calls in GC barriers
   Register buf_array = r10;   // Array of buffered inline types
   Register buf_oop = r11;     // Buffered inline type oop
   Register tmp1 = r15;
   Register tmp2 = r16;
   Register tmp3 = r17;
 
+#ifndef ASSERT
+  RegSet clobbered_gp_regs = MacroAssembler::call_clobbered_gp_registers();
+  assert(clobbered_gp_regs.contains(buf_array), "buf_array must be saved explicitly if it's not a clobber");
+  assert(clobbered_gp_regs.contains(buf_oop), "buf_oop must be saved explicitly if it's not a clobber");
+  assert(clobbered_gp_regs.contains(tmp1), "tmp1 must be saved explicitly if it's not a clobber");
+  assert(clobbered_gp_regs.contains(tmp2), "tmp2 must be saved explicitly if it's not a clobber");
+  assert(clobbered_gp_regs.contains(tmp3), "tmp3 must be saved explicitly if it's not a clobber");
+#endif
+
   if (InlineTypePassFieldsAsArgs) {
     // Is there an inline type argument?
     bool has_inline_argument = false;

From 1a53198db5cf0cd499b0540746839c1233b169cd Mon Sep 17 00:00:00 2001
From: Marc Chevalier <marc.chevalier@oracle.com>
Date: Mon, 15 Dec 2025 12:59:59 +0100
Subject: [PATCH 04/12] Try the thing in oop_store_at

---
 .../gc/shared/cardTableBarrierSetAssembler_aarch64.cpp        | 4 ++++
 .../cpu/x86/gc/shared/cardTableBarrierSetAssembler_x86.cpp    | 4 ++++
 2 files changed, 8 insertions(+)

diff --git a/src/hotspot/cpu/aarch64/gc/shared/cardTableBarrierSetAssembler_aarch64.cpp b/src/hotspot/cpu/aarch64/gc/shared/cardTableBarrierSetAssembler_aarch64.cpp
index 28810638379..83132d1be62 100644
--- a/src/hotspot/cpu/aarch64/gc/shared/cardTableBarrierSetAssembler_aarch64.cpp
+++ b/src/hotspot/cpu/aarch64/gc/shared/cardTableBarrierSetAssembler_aarch64.cpp
@@ -113,15 +113,19 @@ void CardTableBarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorS
   if (needs_post_barrier) {
     // flatten object address if needed
     if (!precise || (dst.index() == noreg && dst.offset() == 0)) {
+#if 0
       if (tmp3 != noreg) {
         // TODO 8366717 This change is from before the 'tmp3' arg was added to mainline, check if it's still needed. Same on x64. Also, this should be a __ lea
         // Called by MacroAssembler::pack_inline_helper. We cannot corrupt the dst.base() register
         __ mov(tmp3, dst.base());
         store_check(masm, tmp3, dst);
       } else {
+#endif
         // It's OK to corrupt the dst.base() register.
         store_check(masm, dst.base(), dst);
+#if 0
       }
+#endif
     } else {
       __ lea(tmp3, dst);
       store_check(masm, tmp3, dst);
diff --git a/src/hotspot/cpu/x86/gc/shared/cardTableBarrierSetAssembler_x86.cpp b/src/hotspot/cpu/x86/gc/shared/cardTableBarrierSetAssembler_x86.cpp
index ff83cbb7f27..9230396a1a9 100644
--- a/src/hotspot/cpu/x86/gc/shared/cardTableBarrierSetAssembler_x86.cpp
+++ b/src/hotspot/cpu/x86/gc/shared/cardTableBarrierSetAssembler_x86.cpp
@@ -180,14 +180,18 @@ void CardTableBarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorS
   if (needs_post_barrier) {
     // flatten object address if needed
     if (!precise || (dst.index() == noreg && dst.disp() == 0)) {
+#if 0
       if (tmp3 != noreg) {
         // Called by MacroAssembler::pack_inline_helper. We cannot corrupt the dst.base() register
         __ movptr(tmp3, dst.base());
         store_check(masm, tmp3, dst);
       } else {
+#endif
         // It's OK to corrupt the dst.base() register.
         store_check(masm, dst.base(), dst);
+#if 0
       }
+#endif
     } else {
       __ lea(tmp1, dst);
       store_check(masm, tmp1, dst);

From e2220aa1fdea11ac708ce5ed4651b9f22b036312 Mon Sep 17 00:00:00 2001
From: Marc Chevalier <marc.chevalier@oracle.com>
Date: Tue, 16 Dec 2025 11:44:34 +0100
Subject: [PATCH 05/12] Actually no

---
 .../gc/shared/cardTableBarrierSetAssembler_aarch64.cpp       | 5 -----
 .../cpu/x86/gc/shared/cardTableBarrierSetAssembler_x86.cpp   | 4 ----
 2 files changed, 9 deletions(-)

diff --git a/src/hotspot/cpu/aarch64/gc/shared/cardTableBarrierSetAssembler_aarch64.cpp b/src/hotspot/cpu/aarch64/gc/shared/cardTableBarrierSetAssembler_aarch64.cpp
index 83132d1be62..666dd056c14 100644
--- a/src/hotspot/cpu/aarch64/gc/shared/cardTableBarrierSetAssembler_aarch64.cpp
+++ b/src/hotspot/cpu/aarch64/gc/shared/cardTableBarrierSetAssembler_aarch64.cpp
@@ -113,19 +113,14 @@ void CardTableBarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorS
   if (needs_post_barrier) {
     // flatten object address if needed
     if (!precise || (dst.index() == noreg && dst.offset() == 0)) {
-#if 0
       if (tmp3 != noreg) {
-        // TODO 8366717 This change is from before the 'tmp3' arg was added to mainline, check if it's still needed. Same on x64. Also, this should be a __ lea
         // Called by MacroAssembler::pack_inline_helper. We cannot corrupt the dst.base() register
         __ mov(tmp3, dst.base());
         store_check(masm, tmp3, dst);
       } else {
-#endif
         // It's OK to corrupt the dst.base() register.
         store_check(masm, dst.base(), dst);
-#if 0
       }
-#endif
     } else {
       __ lea(tmp3, dst);
       store_check(masm, tmp3, dst);
diff --git a/src/hotspot/cpu/x86/gc/shared/cardTableBarrierSetAssembler_x86.cpp b/src/hotspot/cpu/x86/gc/shared/cardTableBarrierSetAssembler_x86.cpp
index 9230396a1a9..ff83cbb7f27 100644
--- a/src/hotspot/cpu/x86/gc/shared/cardTableBarrierSetAssembler_x86.cpp
+++ b/src/hotspot/cpu/x86/gc/shared/cardTableBarrierSetAssembler_x86.cpp
@@ -180,18 +180,14 @@ void CardTableBarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorS
   if (needs_post_barrier) {
     // flatten object address if needed
     if (!precise || (dst.index() == noreg && dst.disp() == 0)) {
-#if 0
       if (tmp3 != noreg) {
         // Called by MacroAssembler::pack_inline_helper. We cannot corrupt the dst.base() register
         __ movptr(tmp3, dst.base());
         store_check(masm, tmp3, dst);
       } else {
-#endif
         // It's OK to corrupt the dst.base() register.
         store_check(masm, dst.base(), dst);
-#if 0
       }
-#endif
     } else {
       __ lea(tmp1, dst);
       store_check(masm, tmp1, dst);

From 7ae82a09cb3b8b2f70f44338343adb946bb90489 Mon Sep 17 00:00:00 2001
From: Marc Chevalier <marc.chevalier@oracle.com>
Date: Tue, 16 Dec 2025 16:03:18 +0100
Subject: [PATCH 06/12] unpack_inline_helper

---
 .../cpu/aarch64/gc/g1/g1BarrierSetAssembler_aarch64.cpp     | 4 +---
 src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp          | 4 +---
 src/hotspot/cpu/x86/macroAssembler_x86.cpp                  | 2 +-
 src/hotspot/share/runtime/signature_cc.hpp                  | 6 +++---
 4 files changed, 6 insertions(+), 10 deletions(-)

diff --git a/src/hotspot/cpu/aarch64/gc/g1/g1BarrierSetAssembler_aarch64.cpp b/src/hotspot/cpu/aarch64/gc/g1/g1BarrierSetAssembler_aarch64.cpp
index cfedd471b84..8944aabb124 100644
--- a/src/hotspot/cpu/aarch64/gc/g1/g1BarrierSetAssembler_aarch64.cpp
+++ b/src/hotspot/cpu/aarch64/gc/g1/g1BarrierSetAssembler_aarch64.cpp
@@ -213,9 +213,7 @@ void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
   // conventions for inline types. Save all argument registers before calling
   // into the runtime.
 
-  // TODO 8366717 This came with 8284161: Implementation of Virtual Threads (Preview) later in May 2022
-  // Check if it's sufficient
-  assert_different_registers(rscratch1, pre_val); // push_CPU_state trashes rscratch1
+  assert_different_registers(rscratch1, pre_val); // push_call_clobbered_registers trashes rscratch1
   __ push_call_clobbered_registers();
 
   // Calling the runtime using the regular call_VM_leaf mechanism generates
diff --git a/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp b/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp
index 9ce5bc098ba..78faa790185 100644
--- a/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp
+++ b/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp
@@ -7161,7 +7161,6 @@ bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, in
 
   Label L_null, L_notNull;
   // Don't use r14 as tmp because it's used for spilling (see MacroAssembler::spill_reg_for)
-  // TODO 8366717 We need to make sure that r14 (and potentially other long-life regs) are kept live in slowpath runtime calls in GC barriers
   Register tmp1 = r10;
   Register tmp2 = r11;
 
@@ -7173,7 +7172,7 @@ bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, in
 #endif
 
   Register fromReg = noreg;
-  ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, -1);
+  ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, true);
   bool done = true;
   bool mark_done = true;
   VMReg toReg;
@@ -7274,7 +7273,6 @@ bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, in
     }
   }
 
-  // TODO 8366717 This is probably okay but looks fishy because stream is reset in the "Set null marker to zero" case just above. Same on x64.
   sig_index = stream.sig_index();
   to_index = stream.regs_index();
 
diff --git a/src/hotspot/cpu/x86/macroAssembler_x86.cpp b/src/hotspot/cpu/x86/macroAssembler_x86.cpp
index 2f5ab26750a..ce19492792d 100644
--- a/src/hotspot/cpu/x86/macroAssembler_x86.cpp
+++ b/src/hotspot/cpu/x86/macroAssembler_x86.cpp
@@ -6095,7 +6095,7 @@ bool MacroAssembler::unpack_inline_helper(const GrowableArray<SigEntry>* sig, in
   Register tmp1 = r10;
   Register tmp2 = r13;
   Register fromReg = noreg;
-  ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, -1);
+  ScalarizedInlineArgsStream stream(sig, sig_index, to, to_count, to_index, true);
   bool done = true;
   bool mark_done = true;
   VMReg toReg;
diff --git a/src/hotspot/share/runtime/signature_cc.hpp b/src/hotspot/share/runtime/signature_cc.hpp
index afe61d7d67e..1798bc79659 100644
--- a/src/hotspot/share/runtime/signature_cc.hpp
+++ b/src/hotspot/share/runtime/signature_cc.hpp
@@ -35,12 +35,12 @@ class ScalarizedInlineArgsStream : public StackObj {
   int _regs_count;
   int _regs_idx;
   int _depth;
-  int _step;
+  const int _step;
   DEBUG_ONLY(bool _finished);
 
 public:
-  ScalarizedInlineArgsStream(const GrowableArray<SigEntry>* sig, int sig_idx, VMRegPair* regs, int regs_count, int regs_idx, int step = 1)
-    : _sig(sig), _sig_idx(sig_idx), _regs(regs), _regs_count(regs_count), _regs_idx(regs_idx), _step(step) {
+  ScalarizedInlineArgsStream(const GrowableArray<SigEntry>* sig, int sig_idx, VMRegPair* regs, int regs_count, int regs_idx, bool reverse = false)
+    : _sig(sig), _sig_idx(sig_idx), _regs(regs), _regs_count(regs_count), _regs_idx(regs_idx), _step(reverse ? -1 : 1) {
     reset(sig_idx, regs_idx);
   }
 

From dbe7c6909388079b90d05493690aee172bcd6624 Mon Sep 17 00:00:00 2001
From: Marc Chevalier <marc.chevalier@oracle.com>
Date: Tue, 16 Dec 2025 17:02:59 +0100
Subject: [PATCH 07/12] gen_c2i_adapter

---
 src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp | 1 -
 1 file changed, 1 deletion(-)

diff --git a/src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp b/src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp
index ebd71ffb680..d18d26dac83 100644
--- a/src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp
+++ b/src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp
@@ -649,7 +649,6 @@ static void gen_c2i_adapter(MacroAssembler *masm,
       // There is at least an inline type argument: we're coming from
       // compiled code so we have no buffers to back the inline types
       // Allocate the buffers here with a runtime call.
-      // TODO 8366717 Do we need to save vectors here? They could be used as arg registers, right? Same on x64.
       RegisterSaver reg_save(true /* save_vectors */);
       OopMap* map = reg_save.save_live_registers(masm, 0, &frame_size_in_words);
 

From e2346166066def2712cc6638701ee750cbb06822 Mon Sep 17 00:00:00 2001
From: Marc Chevalier <marc.chevalier@oracle.com>
Date: Tue, 16 Dec 2025 17:03:19 +0100
Subject: [PATCH 08/12] Experimenting g1_write_barrier_pre

---
 src/hotspot/cpu/x86/gc/g1/g1BarrierSetAssembler_x86.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/hotspot/cpu/x86/gc/g1/g1BarrierSetAssembler_x86.cpp b/src/hotspot/cpu/x86/gc/g1/g1BarrierSetAssembler_x86.cpp
index f824f84714c..f0c326ace32 100644
--- a/src/hotspot/cpu/x86/gc/g1/g1BarrierSetAssembler_x86.cpp
+++ b/src/hotspot/cpu/x86/gc/g1/g1BarrierSetAssembler_x86.cpp
@@ -235,7 +235,7 @@ void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
 
   __ bind(runtime);
 
-  if (EnableValhalla && InlineTypePassFieldsAsArgs) {
+  if (false && EnableValhalla && InlineTypePassFieldsAsArgs) {
     // Barriers might be emitted when converting between (scalarized) calling conventions for inline
     // types. Save all argument registers before calling into the runtime.
     // TODO 8366717: use push_set() (see JDK-8283327 push/pop_call_clobbered_registers & aarch64 )
@@ -279,7 +279,7 @@ void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
     __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
   }
 
-  if (EnableValhalla && InlineTypePassFieldsAsArgs) {
+  if (false && EnableValhalla && InlineTypePassFieldsAsArgs) {
     // Restore registers
     __ movdbl(j_farg0, Address(rsp, 0));
     __ movdbl(j_farg1, Address(rsp, 8));

From c749000659116af98a16fee0716dbaa038feed01 Mon Sep 17 00:00:00 2001
From: Marc Chevalier <marc.chevalier@oracle.com>
Date: Wed, 17 Dec 2025 12:13:58 +0100
Subject: [PATCH 09/12] Cleanup

---
 .../cardTableBarrierSetAssembler_aarch64.cpp  |  2 +-
 .../cpu/aarch64/sharedRuntime_aarch64.cpp     |  1 -
 .../x86/gc/g1/g1BarrierSetAssembler_x86.cpp   | 37 ++-----------------
 .../cardTableBarrierSetAssembler_x86.cpp      |  2 +-
 src/hotspot/cpu/x86/sharedRuntime_x86_64.cpp  |  2 +-
 5 files changed, 7 insertions(+), 37 deletions(-)

diff --git a/src/hotspot/cpu/aarch64/gc/shared/cardTableBarrierSetAssembler_aarch64.cpp b/src/hotspot/cpu/aarch64/gc/shared/cardTableBarrierSetAssembler_aarch64.cpp
index 666dd056c14..d8bf6c77534 100644
--- a/src/hotspot/cpu/aarch64/gc/shared/cardTableBarrierSetAssembler_aarch64.cpp
+++ b/src/hotspot/cpu/aarch64/gc/shared/cardTableBarrierSetAssembler_aarch64.cpp
@@ -113,7 +113,7 @@ void CardTableBarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorS
   if (needs_post_barrier) {
     // flatten object address if needed
     if (!precise || (dst.index() == noreg && dst.offset() == 0)) {
-      if (tmp3 != noreg) {
+      if (InlineTypePassFieldsAsArgs && tmp3 != noreg) {
         // Called by MacroAssembler::pack_inline_helper. We cannot corrupt the dst.base() register
         __ mov(tmp3, dst.base());
         store_check(masm, tmp3, dst);
diff --git a/src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp b/src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp
index d18d26dac83..76799186c7a 100644
--- a/src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp
+++ b/src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp
@@ -208,7 +208,6 @@ OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_
   // will allow deoptimization at this safepoint to find all possible
   // debug-info recordings, as well as let GC find all oops.
 
-  OopMapSet *oop_maps = new OopMapSet();
   OopMap* oop_map = new OopMap(frame_size_in_slots, 0);
 
   for (int i = 0; i < Register::number_of_registers; i++) {
diff --git a/src/hotspot/cpu/x86/gc/g1/g1BarrierSetAssembler_x86.cpp b/src/hotspot/cpu/x86/gc/g1/g1BarrierSetAssembler_x86.cpp
index f0c326ace32..8d62646e0c9 100644
--- a/src/hotspot/cpu/x86/gc/g1/g1BarrierSetAssembler_x86.cpp
+++ b/src/hotspot/cpu/x86/gc/g1/g1BarrierSetAssembler_x86.cpp
@@ -235,24 +235,9 @@ void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
 
   __ bind(runtime);
 
-  if (false && EnableValhalla && InlineTypePassFieldsAsArgs) {
-    // Barriers might be emitted when converting between (scalarized) calling conventions for inline
-    // types. Save all argument registers before calling into the runtime.
-    // TODO 8366717: use push_set() (see JDK-8283327 push/pop_call_clobbered_registers & aarch64 )
-    __ pusha();
-    __ subptr(rsp, 64);
-    __ movdbl(Address(rsp, 0),  j_farg0);
-    __ movdbl(Address(rsp, 8),  j_farg1);
-    __ movdbl(Address(rsp, 16), j_farg2);
-    __ movdbl(Address(rsp, 24), j_farg3);
-    __ movdbl(Address(rsp, 32), j_farg4);
-    __ movdbl(Address(rsp, 40), j_farg5);
-    __ movdbl(Address(rsp, 48), j_farg6);
-    __ movdbl(Address(rsp, 56), j_farg7);
-  } else {
-    // Determine and save the live input values
-    __ push_call_clobbered_registers();
-  }
+  // Barriers might be emitted when converting between (scalarized) calling conventions for inline
+  // types. Save all argument registers before calling into the runtime.
+  __ push_call_clobbered_registers();
 
   // Calling the runtime using the regular call_VM_leaf mechanism generates
   // code (generated by InterpreterMacroAssember::call_VM_leaf_base)
@@ -279,21 +264,7 @@ void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
     __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_pre_entry), pre_val, thread);
   }
 
-  if (false && EnableValhalla && InlineTypePassFieldsAsArgs) {
-    // Restore registers
-    __ movdbl(j_farg0, Address(rsp, 0));
-    __ movdbl(j_farg1, Address(rsp, 8));
-    __ movdbl(j_farg2, Address(rsp, 16));
-    __ movdbl(j_farg3, Address(rsp, 24));
-    __ movdbl(j_farg4, Address(rsp, 32));
-    __ movdbl(j_farg5, Address(rsp, 40));
-    __ movdbl(j_farg6, Address(rsp, 48));
-    __ movdbl(j_farg7, Address(rsp, 56));
-    __ addptr(rsp, 64);
-    __ popa();
-  } else {
-    __ pop_call_clobbered_registers();
-  }
+  __ pop_call_clobbered_registers();
 
   __ bind(done);
 }
diff --git a/src/hotspot/cpu/x86/gc/shared/cardTableBarrierSetAssembler_x86.cpp b/src/hotspot/cpu/x86/gc/shared/cardTableBarrierSetAssembler_x86.cpp
index ff83cbb7f27..bd80e7b20bf 100644
--- a/src/hotspot/cpu/x86/gc/shared/cardTableBarrierSetAssembler_x86.cpp
+++ b/src/hotspot/cpu/x86/gc/shared/cardTableBarrierSetAssembler_x86.cpp
@@ -180,7 +180,7 @@ void CardTableBarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorS
   if (needs_post_barrier) {
     // flatten object address if needed
     if (!precise || (dst.index() == noreg && dst.disp() == 0)) {
-      if (tmp3 != noreg) {
+      if (InlineTypePassFieldsAsArgs && tmp3 != noreg) {
         // Called by MacroAssembler::pack_inline_helper. We cannot corrupt the dst.base() register
         __ movptr(tmp3, dst.base());
         store_check(masm, tmp3, dst);
diff --git a/src/hotspot/cpu/x86/sharedRuntime_x86_64.cpp b/src/hotspot/cpu/x86/sharedRuntime_x86_64.cpp
index 9696993fc6a..d6fa31eb4a6 100644
--- a/src/hotspot/cpu/x86/sharedRuntime_x86_64.cpp
+++ b/src/hotspot/cpu/x86/sharedRuntime_x86_64.cpp
@@ -918,7 +918,7 @@ static void gen_c2i_adapter(MacroAssembler *masm,
       // There is at least an inline type argument: we're coming from
       // compiled code so we have no buffers to back the inline types.
       // Allocate the buffers here with a runtime call.
-      OopMap* map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words, /*save_vectors*/ false);
+      OopMap* map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words, /*save_wide_vectors*/ false);
 
       frame_complete = __ offset();
 

From 4adfc04dbf36556e4fa0ce542d6f62fdb17e9a54 Mon Sep 17 00:00:00 2001
From: Marc Chevalier <marc.chevalier@oracle.com>
Date: Wed, 17 Dec 2025 14:44:15 +0100
Subject: [PATCH 10/12] assert in oop_store_at

---
 .../aarch64/gc/shared/cardTableBarrierSetAssembler_aarch64.cpp | 3 ++-
 .../cpu/x86/gc/shared/cardTableBarrierSetAssembler_x86.cpp     | 3 ++-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/hotspot/cpu/aarch64/gc/shared/cardTableBarrierSetAssembler_aarch64.cpp b/src/hotspot/cpu/aarch64/gc/shared/cardTableBarrierSetAssembler_aarch64.cpp
index d8bf6c77534..4644005f3fd 100644
--- a/src/hotspot/cpu/aarch64/gc/shared/cardTableBarrierSetAssembler_aarch64.cpp
+++ b/src/hotspot/cpu/aarch64/gc/shared/cardTableBarrierSetAssembler_aarch64.cpp
@@ -113,7 +113,8 @@ void CardTableBarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorS
   if (needs_post_barrier) {
     // flatten object address if needed
     if (!precise || (dst.index() == noreg && dst.offset() == 0)) {
-      if (InlineTypePassFieldsAsArgs && tmp3 != noreg) {
+      if (tmp3 != noreg) {
+        assert(InlineTypePassFieldsAsArgs, "nope");
         // Called by MacroAssembler::pack_inline_helper. We cannot corrupt the dst.base() register
         __ mov(tmp3, dst.base());
         store_check(masm, tmp3, dst);
diff --git a/src/hotspot/cpu/x86/gc/shared/cardTableBarrierSetAssembler_x86.cpp b/src/hotspot/cpu/x86/gc/shared/cardTableBarrierSetAssembler_x86.cpp
index bd80e7b20bf..6ec722d0275 100644
--- a/src/hotspot/cpu/x86/gc/shared/cardTableBarrierSetAssembler_x86.cpp
+++ b/src/hotspot/cpu/x86/gc/shared/cardTableBarrierSetAssembler_x86.cpp
@@ -180,7 +180,8 @@ void CardTableBarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorS
   if (needs_post_barrier) {
     // flatten object address if needed
     if (!precise || (dst.index() == noreg && dst.disp() == 0)) {
-      if (InlineTypePassFieldsAsArgs && tmp3 != noreg) {
+      if (tmp3 != noreg) {
+        assert(InlineTypePassFieldsAsArgs, "nope");
         // Called by MacroAssembler::pack_inline_helper. We cannot corrupt the dst.base() register
         __ movptr(tmp3, dst.base());
         store_check(masm, tmp3, dst);

From 6696808a220e239d963bb21c48f734bef54236df Mon Sep 17 00:00:00 2001
From: Marc Chevalier <marc.chevalier@oracle.com>
Date: Wed, 17 Dec 2025 15:51:30 +0100
Subject: [PATCH 11/12] oop_store_at

---
 .../aarch64/gc/shared/cardTableBarrierSetAssembler_aarch64.cpp | 3 +--
 .../cpu/x86/gc/shared/cardTableBarrierSetAssembler_x86.cpp     | 3 +--
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/src/hotspot/cpu/aarch64/gc/shared/cardTableBarrierSetAssembler_aarch64.cpp b/src/hotspot/cpu/aarch64/gc/shared/cardTableBarrierSetAssembler_aarch64.cpp
index 4644005f3fd..a7778f8fcfe 100644
--- a/src/hotspot/cpu/aarch64/gc/shared/cardTableBarrierSetAssembler_aarch64.cpp
+++ b/src/hotspot/cpu/aarch64/gc/shared/cardTableBarrierSetAssembler_aarch64.cpp
@@ -114,8 +114,7 @@ void CardTableBarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorS
     // flatten object address if needed
     if (!precise || (dst.index() == noreg && dst.offset() == 0)) {
       if (tmp3 != noreg) {
-        assert(InlineTypePassFieldsAsArgs, "nope");
-        // Called by MacroAssembler::pack_inline_helper. We cannot corrupt the dst.base() register
+        // When tmp3 is given, we cannot corrupt the dst.base() register (from MacroAssembler::pack_inline_helper or do_oop_store)
         __ mov(tmp3, dst.base());
         store_check(masm, tmp3, dst);
       } else {
diff --git a/src/hotspot/cpu/x86/gc/shared/cardTableBarrierSetAssembler_x86.cpp b/src/hotspot/cpu/x86/gc/shared/cardTableBarrierSetAssembler_x86.cpp
index 6ec722d0275..9e26f2892f4 100644
--- a/src/hotspot/cpu/x86/gc/shared/cardTableBarrierSetAssembler_x86.cpp
+++ b/src/hotspot/cpu/x86/gc/shared/cardTableBarrierSetAssembler_x86.cpp
@@ -181,8 +181,7 @@ void CardTableBarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorS
     // flatten object address if needed
     if (!precise || (dst.index() == noreg && dst.disp() == 0)) {
       if (tmp3 != noreg) {
-        assert(InlineTypePassFieldsAsArgs, "nope");
-        // Called by MacroAssembler::pack_inline_helper. We cannot corrupt the dst.base() register
+        // When tmp3 is given, we cannot corrupt the dst.base() register (from MacroAssembler::pack_inline_helper or do_oop_store)
         __ movptr(tmp3, dst.base());
         store_check(masm, tmp3, dst);
       } else {

From bf65d1181529b32099ad4100687dac923d30788a Mon Sep 17 00:00:00 2001
From: Marc Chevalier <marc.chevalier@oracle.com>
Date: Fri, 19 Dec 2025 09:37:47 +0100
Subject: [PATCH 12/12] Pick the right comment again

---
 src/hotspot/cpu/x86/gc/g1/g1BarrierSetAssembler_x86.cpp | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/src/hotspot/cpu/x86/gc/g1/g1BarrierSetAssembler_x86.cpp b/src/hotspot/cpu/x86/gc/g1/g1BarrierSetAssembler_x86.cpp
index 0352ca18acb..c385186855d 100644
--- a/src/hotspot/cpu/x86/gc/g1/g1BarrierSetAssembler_x86.cpp
+++ b/src/hotspot/cpu/x86/gc/g1/g1BarrierSetAssembler_x86.cpp
@@ -236,8 +236,7 @@ void G1BarrierSetAssembler::g1_write_barrier_pre(MacroAssembler* masm,
   __ jcc(Assembler::equal, done);
   generate_pre_barrier_slow_path(masm, obj, pre_val, thread, tmp, done);
 
-  // Barriers might be emitted when converting between (scalarized) calling conventions for inline
-  // types. Save all argument registers before calling into the runtime.
+  // Determine and save the live input values
   __ push_call_clobbered_registers();
 
   // Calling the runtime using the regular call_VM_leaf mechanism generates