arm64: Improve clang to use zero register for inline asm

[mrutland-arm]

With gcc inline assembly, using the "Z" constraint with the "w" or "x" operand modifiers results in the "wzr" or "xzr" zero register being used. This is described in the GCC documentation for AArch64 operand modifiers:

https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html#AArch64-Operand-Modifiers

The "Z" constraint is described in:
https://gcc.gnu.org/onlinedocs/gcc/Machine-Constraints.html

The arm64 kernel port uses these constraints for several pieces of of inline assembly (e.g. MMIO accessors, and system register accessors), but LLVM doesn't (currently) use the zero register for these cases, and instead movess the integer constant zero into another general purpose register, as noted on the list:

• https://lore.kernel.org/linux-arm-kernel/ZbJEX_gGjIewMdVy@FVFF77S0Q05N.cambridge.arm.com/
• https://lore.kernel.org/linux-arm-kernel/20251007102600.879337-1-lpieralisi@kernel.org/

It would be helpful if LLVM could generate the zero register for these cases, as this will result in better code generation.

[nathanchance]

I forwarded this upstream to see if there is anyone who knows the AArch64 backend that could implement this: llvm/llvm-project#162567